One Engineer's Six-Month Quest to Build a GPU From Scratch Using 8,192 RISC-V Chips

The Absurd Scale of a DIY Graphics Processor

At DailyTechWire, we've tracked plenty of ambitious hardware projects across Asia's maker communities, but few match the sheer stubbornness of building a functional graphics processing unit from individual microcontroller chips. Electrical engineer and content creator bitluni recently completed a six-month odyssey constructing a homebrew GPU cluster from 8,192 individual RISC-V microcontrollers, each costing thirteen cents. The result: a device capable of driving a 320x200 pixel display, roughly equivalent to the graphics resolution of early 1990s gaming systems.

The project wasn't originally on bitluni's roadmap. After publishing documentation of an earlier homemade GPU experiment, PCB design software company Altium approached him about a partnership that would provide both budget and professional-grade design tools. The opportunity opened the door to a cluster build at a scale he described as "just insane."

The technical foundation rests on the CH570, a RISC-V microcontroller running at 100 MHz with 12 kilobytes of SRAM. Bitluni sourced the chips directly from the manufacturer, an indication that volume procurement of obscure components still requires navigating supply chains outside standard distribution channels. His architecture connects these 8,192 smaller cores to 256 larger cores equipped with floating-point units, creating a hierarchical processing structure that mirrors, in vastly simplified form, the tile-based designs used in contemporary GPUs.

When PCB Complexity Breaks the Ordering System

The physical implementation hit its first wall before a single board arrived. Bitluni's six-layer PCB design arranged 32 rows of 32 chips per blade, a density that proved too intricate for his manufacturer's web ordering system to process. The website simply couldn't handle the file complexity, forcing him to split each blade into two separate pieces. This wasn't a minor inconvenience: it fundamentally altered the mechanical and electrical architecture of the cluster, introducing additional interconnects and potential points of failure.

That manufacturing constraint also meant the current build represents a scaled-back version of the original vision. Bitluni has already acquired components for a second iteration that will incorporate 32,000 microcontrollers, nearly quadrupling the core count. Whether PCB fabrication processes can accommodate that density remains an open question.

Debugging at the Blade Level

When the first test blade arrived, intermittent failures plagued several MCUs. Some wouldn't initialize; others would function sporadically before dropping offline. Root cause analysis pointed to trace routing: electromagnetic interference between adjacent signal paths was corrupting data. Bitluni relocated traces in a complete redesign, then waited several weeks for replacement boards to arrive.

The replacement batch introduced a different problem, one familiar to anyone who has hand-routed serial communication lines. He had crossed the MOSI and MISO lines in the schematic, effectively wiring output channels into input ports across hierarchical levels. Level 0 and Level 1 couldn't establish communication. Bitluni manually bypassed the error on sample boards by rewiring connections, but the bulk order had already been manufactured to the flawed specification. He noted in his project documentation that confusing transmit and receive lines is nearly inevitable on the first iteration, regardless of experience level.

The Economics of Homebrew Silicon

The CH570's unit cost of $0.13 positions it at the extreme low end of the microcontroller market, a price point typically associated with high-volume consumer electronics in Shenzhen or appliance control systems. At 8,192 units, the chip cost alone totals just over $1,000, before factoring in custom PCB fabrication, passives, connectors, RGB LEDs (one per MCU), and the 256 larger cores managing coordination.

For context, a mainstream discrete GPU in 2026 contains tens of billions of transistors fabricated on a single die using sub-5nm processes, with memory bandwidth measured in terabytes per second. Bitluni's cluster, by contrast, operates with kilobytes of SRAM per core and communication bottlenecked by SPI buses running across PCB traces. The performance gap is enormous, but that's not the point. The project exposes the architectural decisions and engineering trade-offs that commercial silicon abstracts away behind driver APIs and marketing specifications.

What 8,192 Cores Can Actually Do

Each microcontroller in the array is individually programmable and connected to an RGB LED, effectively turning the cluster into a massively parallel, if extremely low-resolution, graphics engine. The 320x200 output resolution classifies as QVGA, a standard that peaked in feature phones and early portable media players.

Bitluni has not yet published performance benchmarks or detailed application examples; those are slated for a follow-up video along with the full design files, board layouts, and firmware source code. The release will allow other hardware engineers to attempt replication, though the barrier to entry remains high: multi-layer PCB fabrication, firmware development across thousands of cores, and the patience to debug communication protocols at scale.

The Tooling Gap in Extreme DIY Hardware

One under-discussed aspect of projects at this complexity level is the tooling mismatch. Professional semiconductor design relies on simulation environments, automated place-and-route algorithms, and verification suites that cost hundreds of thousands of dollars in licensing fees. Bitluni's partnership with Altium provided access to advanced PCB design software, but that still falls short of the full EDA stack used by ASIC or FPGA teams.

The result is a workflow that blends professional-grade layout tools with manual debugging, oscilloscope troubleshooting, and iterative board respins. It's a hybrid approach that reflects the broader challenge facing hardware startups and independent engineers across Asia: access to capital and components has improved dramatically over the past decade, but access to the software infrastructure that enables first-pass success remains concentrated in large firms.

Why Anyone Would Attempt This

The practical utility of a homebrew GPU cluster is effectively zero. No one will mine cryptocurrency on it, train neural networks, or render video games. But the project serves a different purpose: it's a teaching artifact and a demonstration of what remains possible outside the vertically integrated supply chains that dominate semiconductor manufacturing.

Bitluni's work sits in a lineage of extreme DIY electronics projects that includes homebrew CPUs built from discrete transistors, software-defined radios assembled from salvaged components, and FPGA-based recreations of vintage computing hardware. These projects exist at the intersection of education, performance art, and engineering documentation. They make visible the layers of abstraction that modern computing relies on, and they provide a visceral reminder that every chip in every device is ultimately the product of countless design decisions, compromises, and late-night debugging sessions.

The next iteration, with its 32,000-core target, will test whether the PCB manufacturing ecosystem can accommodate even higher densities, and whether the communication architecture can scale without collapsing under coordination overhead. At DailyTechWire, we'll be watching to see if the second build encounters the same categories of failure, or if entirely new problems emerge at that scale.